In flip chip microelectronic assembly, electronic components or “chips” are connected face-down (i.e. “flipped”) onto substrates, circuit boards, or carriers by means of conductive bumps that are formed on the chip's bond pads. Flip chip assembly eliminates bond wires, greatly reduces induction and capacitance in connections, and shortens electrical paths, thereby providing a device with high speed electrical performance. When wire bond connections are used, they are limited to the perimeter of the die, which increases the die size as the number of connections increases. Flip chip connections use the whole area of the die, not just the perimeter, and can accommodate many more connections on a smaller die.
Flip chip assemblies are manufactured in three stages: bumping the die or wafer (i.e. creating stud bumps on the bond pads of the die), attaching the bumped die to the substrate, and filling the space under the die with an electrically non-conductive underfill material. The bump provides an electrically conductive path from the chip to the substrate. The bump also provides a thermally conductive path to carry heat from the chip to the substrate. Additionally, the bump provides a spacer, preventing electrical contact between the chip and substrate.
In a typical process, gold is used to form the stud bumps. In a gold bump flip chip, the bumps are formed on the die using a modified wire bonding technique. A gold wire passes through a capillary tool and is melted to form a ball or sphere on a chip bond pad. In wire bonding, connections are made by keeping the wire bonded to the sphere. In a flip chip assembly, after the gold ball is attached to the chip bond pad, then the gold wire is broken off leaving a stud bump. The wire may be separated, for example, using a wire clamp to grab the gold wire while the wire and capillary are moved away from the ball, which causes the wire to break. When the gold wire is broken, a stud bump remains on the bond pad and provides a permanent connection to the underlying metal.
Once the stud bumps have been formed on the bond pads of a chip, the chip is then flipped so that the stud bumps face downward and are aligned with other bond pads on a substrate. Once aligned, each stud bump is electrically and mechanically connected to a corresponding substrate bond pad using solder. Gold stud bump flip chips may also be attached to the substrate bond pads with a electrically conductive adhesive or by thermosonic gold-to-gold connection. The surface of the chip may be covered with a protective polymer overcoat such as polyimide (PIQ) or poly-benzoxasole (PBO). The surface of the substrate may be covered with a solder resist.
Typically, the protective overcoat is approximately 5 um thick, and solder resist is approximately 30 um thick. The stand-off height for typical prior art stud bumps is approximately 36 um, and bond pads are typically 15 um thick. The resulting gap between bond pads on the chip and bond pads on the substrate is approximately 35 um, and the gap between the protective overcoat on the chip and solder resist on the substrate is approximately 15 um. The underfill adhesive must flow in these gaps to fill all the space between the chip and the substrate.
In the final stage of assembly, the space between the chip and the substrate is filled with a non-conductive underfill adhesive that joins the entire surface of the chip to the substrate. The underfill protects the bumps from environmental factors such as moisture and provides mechanical strength to the assembly by making it a solid block. It also compensates for any thermal expansion difference between the chip and the substrate. The underfill mechanically locks the chip and the substrate together so that differences in thermal expansion do not break or damage the electrical connection of the bumps. The underfill may be dispensed along the edges of the assembly and then drawn into the area under the chip by capillary action.
The size of the effective joint that is formed between the chip and the substrate is determined in part by the size and shape of stud bump and the amount of solder that is applied. The underfill adhesive flows into the space between the chip and the substrate and around the stud bumps and solder. It is desirable that effective joint is as large as possible to optimize the electrical and mechanical connection between the chip and the substrate. Higher bonding force may be used to increase the solder joint area. The flip chip die bonder can press the die into the substrate with more force. A disadvantage of this method is a reduction in the clearance between the chip and the substrate, which makes it more difficult for the underfill to fill all the voids in the device. A further disadvantage is that using higher bonding force causes more stress on the die, which may damage the chip or stud bumps.
Prior art methods to address problems with underfill adhesive coverage include using multiple stud bumps that are formed on top of each other. Forming two or more stud bumps on top of each other, results in a taller bump that increases the gap between the chip and the substrate, thereby increasing the space in which the underfill flows. A disadvantage of using stacked stud bumps is the increase in manufacturing time that is needed to form the additional bumps. A further disadvantage of this method is that the stacked stud bumps tend to be weaker than single bumps and the die undergoes additional stress to form the extra bumps.
Another prior art method of increasing the space between the chip and substrate is to remove the PBO layer from the chip. A disadvantage of this method is poor die reliability because protection of the die surface has been removed. Accordingly, the removal of the protective overcoat layer is not desired.